Application Note Networking Silicon 317503-001 Revision 1.7 Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The 82562EZ(EX) and 82551QM Fast Ethernet Controllers and the 82540EM Gigabit Ethernet Controller may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800- 548-4725 or by visiting Intel's website at http://www.intel.com. Intel® is a trademark or register trademark of Intel Corporation or its subsidiaries in the United States and other countries. Copyright © 2008, Intel Corporation. * Other product and corporate names may be trademarks of other companies and are used only for explanation and to the owners’ benefit, without intent to infringe. ii 82562EZ(EX)/82551QM & 82540EM Combined Footprint LOM Design Guide Revision History Revision 0.75 0.80 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 Revision Date Jan 2002 August 2002 April 2003 September 2003 November 2004 January 2005 January 2005 August 2005 July 2006 January 2008 Description Preliminary Draft Revised pin assignments: E1, E12, G5, G6, G13, H5, H6, H7, H8, H11, J5, J6, J7, J8, J9, J10, J11, K5, K6, K7, K8, K9, K10, K11, L4, L5, L9, L10. Non-classified release. Section 1.0. Added product ordering codes. Appended reference schematics. Updated reference schematics to reflect MDI-X feature (82551QM only). Added crystal start-up information. Information includes: • New crystal parameters • Crystal selection guidelines • Crystal validation methods • Crystal testing methods Added new values for TX and RX terminations (next to LAN silicon). New values are now 110 Ω for both TX and RX terminations. Added new starting values for RBIAS100 and RBIAS10. New starting values are now 649 Ω for RBIAS100 and 619 Ω for RBIAS10. Updated reference schematics to reflect new Tx and Rx termination values, new LAN disable circuit, RBIAS100/RBIAS10 values, VIO signaling connection and pullup resistor value. Changed pin A13 output resistor Read the full 82562EZ(EX)/82551QM & 82540EM Combined Footprint LOM Design Guide.