Revision 1.1 1.2 1.3 2.0 Date January-10 January-10 May-10 May-11 Changes Replaced 10 µF capacitor with 0 W resistor. Reworded majority of layout guidance for clarity Relaxed restrictions on crystal layout placement guidance Clarified which PCIe pins have to be connected. Updated JTAG guidance. Reworded different sections of the schematic guidance for clarity. Better explained the two 1.05V power delivery options. Updated 1.05 Vdc decoupling requirement to 20 uF min & 3.3 Vdc decoupling requirement to 22 uF min. Updated the oscillator connection requirements. (6.8 pF series cap) Updated iSVR inductor selection requirements Removed pull-up resistor for LAN-DISABLE signal. Converted to PDF Form for public distribution. Rev 2.0; 325261-002EN INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS OTHERWISE AGREED IN WRITING BY INTEL, THE INTEL PRODUCTS ARE NOT DESIGNED NOR INTENDED FOR ANY APPLICATION IN WHICH THE FAILURE OF THE INTEL PRODUCT COULD CREATE A SITUATION WHERE PERSONAL INJURY OR DEATH MAY OCCUR. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The information here is subject to change without notice. Do not finalize a design with this information. The products described in this document may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an order number and are referenced in this document, or other Intel literature, may be obtained by calling 1-800-548-4725, or go to: http://www.intel.com/design/literature.htm Intel and the Intel logo are trademarks of Intel Corporation in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. Copyright Intel Corporation. 2010-2011. swuffner Typewritten Text swuffner Typewritten Text NOTE: Adobe* Reader* version 8 or above must be used in order to save your input to this form electronically. To update, the latest Reader application is available for free download at http://get.adobe.com/reader/. swuffner Typewritten Text swuffner Typewritten Text swuffner Typewritten Text swuffner Typewritten Text swuffner Typewritten Text swuffner Typewritten Text swuffner Typewritten Text swuffner Typewritten Text swuffner Typewritten Text swuffner Typewritten Text SECTION General Support Pins PCIe Interface 82579 Schematic Checklist v2.0 CHECK ITEMS REMARKS Obtain the most recent documentation and specification Documents can be subject to frequent changes made updates. without notice. This checklist is intended to be used in conjunction with Read the full ® Intel 82579 Gigabit Ethernet Controller Checklists v2.0 LAN Access Division (LAD) Project Name Fab Revision Date Schematic Designer Layout Designer Intel Contact(s) Reviewer(s).