Intel® Agilex™ FPGA family leverages heterogeneous 3D system-in-package (SiP) technology to integrate Intel’s first FPGA fabric built on 10nm process technology and 2nd Gen Intel® Hyperflex™ FPGA Architecture to deliver up to 40% higher performance1 or up to 40% lower power1 for applications in Data Center, Networking, and Edge compute. Intel® Agilex™ SoC FPGAs also integrate the quad-core Arm* Cortex-A53 processor to provide high system integration.
Intel® Agilex™ F-Series FPGAs and SoC FPGAs bring together transceiver support up to 58 Gbps, increased DSP capabilities, high system integration, and 2nd Gen Intel® Hyperflex™ architecture for a wide range of applications in Data Center, Networking, and Edge. Intel® Agilex™ F-Series FPGA and SoC family also provides the option to integrate the quad-core Arm* Cortex-A53 processor to provide high system integration.
Intel® Agilex™ I-Series SoC FPGAs are optimized for high performance processor interface and bandwidth intensive applications. Coherent attach to Intel® Xeon® processors with Compute Express Link, hardened PCIe* Gen 5 support and transceiver support up to 112 Gbps make the Intel® Agilex™ I-Series SoC FPGAs a compelling choice for applications which demand massive interface bandwidth and high performance.
Intel® Agilex™ M-Series SoC FPGAs are optimized for compute and memory intensive applications. With Coherent attach to Intel® Xeon® processors, HBM integration, hardened DDR5 controller, and Intel® Optane™ DC persistent memory support the Intel® Agilex™ M-Series SoC FPGAs are optimized for data-intensive applications which need massive memory in addition to high bandwidth. Coming soon.
Intel’s 10nm technology based Intel® Agilex™ FPGAs and SoCs combine agility and flexibility to deliver customized connectivity and acceleration by optimally balancing power, performance, and memory utilization for a variety of compute, data, and memory intensive applications.
Learn how Intel® Agilex™ FPGAs and SoCs combine the power of heterogeneous architecture, transceiver leadership, and programmable software to deliver higher silicon integration, smaller form factor, and energy efficient compute acceleration for applications from the edge to cloud.
With the Compute Express Link, Intel® Agilex™ FPGA, and SoC family offers the industry’s first Cache and Memory coherent interconnect to Intel® Xeon® processors. This revolutionary FPGA interconnect will provide low latency and performance gains for memory intensive applications with massive data processing needs.
Intel® Agilex™ FPGA and SoC family delivers accelerated transceiver innovation with data rates up to 112Gbps and support for PCI Express* up to Gen 5. Intel® Agilex™ FPGA and SoC family will allow customers to choose from a comprehensive transceiver portfolio of 28.3Gbps, 58Gbps, and 112Gbps transceiver tiles. Decoupling the transceiver development accelerates product innovation.
Intel® Agilex™ FPGA and SoC family offers a configurable DSP engine which features hardened support for single-precision FP32, half-precision FP16, BFLOAT16, and INT8 calculations. Intel® Agilex™ FPGA and SoC family also supports low- precision configurations from INT7 to INT2 for maximum flexibility. Intel® Agilex™ FPGA programmability, coupled with the innovations in the DSP blocks is ideal for evolving AI workloads.
With the proven Embedded multi-die Interconnect Bridge (EMIB) technology, Intel® Agilex™ FPGA, and SoC family offers high density die-to-die interconnect for heterogeneous chips and delivers high performance at low cost. A large library of tiles including transceivers, custom IO, custom compute, and Intel® eASIC™ device tiles provide the agility, flexibility, and customization needed for a variety of applications.
Intel® Agilex™ FPGA and SoC family delivers optimal power, performance, and logic utilization efficiency by integrating hardened protocols for many popular functions including 100/200/400G Ethernet, PCIe* Gen 4/5 interface, Interlaken, CPRI, JESD204B/C, and many more.
Intel® Agilex™ FPGA and SoC family features the industry’s first FPGA support for Intel® Optane™ DC persistent memory. In addition to this, HBM integration allows up to 16GB of external memory to be offered in-package affording up to 512 GB/s of peak memory bandwidth. Dedicated DDR5/4 hard memory controllers will support further on-board DRAM memory expansion.
Continuous improvements to the acclaimed Intel® Hyperflex™ architecture deliver improved performance compared to Intel® Stratix® 10 device designs. The 2nd Gen Intel® Hyperflex™ architecture will be extended to all densities and variants of Intel® Agilex™ FPGA and SoC family and thus greatly improve the productivity of customers and reduce time-to-market.
A Secure Device Manager will serve as the central command center for the entire FPGA, controlling key operations, such as configuration, device security, single event upset (SEU) responses, and power management. The Secure Device Manager creates an unified, secure management system for the FPGA fabric, hard processor system (HPS) in SoCs, embedded hard IP blocks, and I/O blocks.
Intel® Enpirion® Power Solutions are high-frequency DC-DC step-down power converters designed and validated for Intel® FPGA, CPLD, and SoCs. These robust, easy-to-use power modules integrate nearly all of the components needed to build a power supply – saving you board space and simplifying the design process.
Compatible design deliver the highest performance, highest logic utilization, and fast compile times for high-end FPGA designs.
Intel® Quartus® Prime Design Software is a multiplatform design environment that easily adapts to your specific needs in all phases of FPGA, CPLD, and SoC design. Intel® Quartus® Prime Software delivers the highest performance and productivity for Intel® FPGA, CPLD, and SoCs.
"One API" Software: Intel announced the One API project to simplify the programming of diverse computing engines across CPU, GPU, FPGA, AI, and other accelerators. The project includes a comprehensive and unified portfolio of developer tools for mapping software to the hardware that can best accelerate the code. A public project release is expected to be available in 2019.
The Intel® Agilex™ FPGA and SoC Webinar Series accelerate developers to learn and use Intel® Agilex™ device, features and applications. Register today to attend the live webinars and access on-demand content. Registration links to future sessions will be added as they become available. Check back again at a later date for more details.
|The FPGA for Data Centric World Intel® Agilex™ FPGAs and SoC||
October 23rd, 2019
9:00 AM to 9:45 AM PT
October 22nd, 2019
10:00 AM to 10:45 AM CEST
December 19th, 2019
||Learn how Intel® Agilex™ FPGAs and SoCs are designed to help engineers quickly deliver optimized acceleration for Intel® Xeon™ processor in the data center, tailor transformation in the network, and low-latency, real-time acceleration at the edge.|
|Intel® Hyperflex™ Architecture Overview for Intel® Agilex™ Devices||
November 7th, 2019
9:00 AM to 10:00 AM PT
November 12th, 2019
10:00 AM to 11:00 AM CET
|Coming soon||Coming soon||Learn how the 2nd generation Intel® Hyperflex™ Architecture enables up to 40% higher core performance1, or how the intel process helps reduce power by up to 40% lower power1 in Intel® Agilex™ devices when compared to Intel’s previous generation high-performance FPGAs.|
|Introduction to Intel® Agilex™ FPGA PCI Express* Features
December 3rd, 2019
9:00 AM to 10:00 AM PT
December 17th, 2019
10:00 AM to 11 AM CET
|Coming soon||Coming soon||Learn how Intel® Agilex™ PCIe* Gen4 solution delivers 2X more PCIe* bandwidth2 compared to previous generation of Intel FPGAs, enabling coherent connection and faster connectivity to future select Intel® Xeon® Scalable processors.|
|EMIF (Coming soon)||January 2020||January 2020||Coming soon||Coming soon||Coming soon|
|100G Ethernet (Coming soon)||February 2020||February 2020||Coming soon||Coming soon||Coming soon|
|SoC (Coming soon)||March 2020||March 2020||Coming soon||Coming soon||Coming soon|
|Board Design Consideration (Coming soon)||April 2020||April 2020||Coming soon||Coming soon||Coming soon|
|Link Inspector (Coming soon)||May 2020||May 2020||Coming soon||Coming soon||Coming soon|
Watch this video introducing the power-on and initial operational results of the first FPGA for the data-centric world.
See the Hard Processor System (HPS) in the first Intel® Agilex™ SoC boot up with Linux.
Watch this video to learn more about how Intel® Agilex™ FPGA and SoC family delivers customized connectivity, low latency, maximum data throughput, and customized acceleration by combining agility and flexibility to process, store, and move data for data-centric applications.
Significant architectural improvements, DSP innovations, and fundamental changes in routing and layout combine to deliver up to 40% higher performance1 or 40% lower power1 with the Intel® Agilex™ FPGA and SoC family. Checkout the video to learn more!
Find technical documentation, videos, and training courses for your Intel® Agilex™ device designs.
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