SoC EDS 17.0에서 Arria 10용 u-boot-socfpga에서 MT25QU02GCBB8E12-0SIT QSPI 장치에 대한 지원을 추가하려면 uboot-socfpga/드라이버/mtd/spi/spi/sf_params.c를 변경합니다.
텍스트 편집기에서 파일 uboot-socfpga/드라이버/mtd/spi/sf_params.c를 편집하고 장치를 추가합니다(굵게 표시된 추가 기능):
#ifdef CONFIG_SPI_FLASH_STMICRO /* STMICRO */
{"M25P10", 0x202011, 0x0, 32 * 1024, 4, 0, 0},
{"M25P20", 0x202012, 0x0, 64 * 1024, 4, 0, 0},
{"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0, 0},
{"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0, 0},
{"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0, 0},
{"M25PE16", 0x208015, 0x1000, 64 * 1024, 32, 0, 0},
{"M25PX16", 0x207115, 0x1000, 64 * 1024, 32, RD_EXTN, 0},
{"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0, 0},
{"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0, 0},
{"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0, 0},
{"M25PX64", 0x207117, 0x0, 64 * 1024, 128, 0, SECT_4K},
{"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K},
{"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K},
{"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K},
{"N25Q64A", 0x20bb17, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K},
{"N25Q128", 0x20ba18, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP},
{"N25Q128A", 0x20bb18, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP},
{"N25Q256", 0x20ba19, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP | SECT_4K},
{"N25Q256A", 0x20bb19, 0x0, 64 * 1024, 512, RD_FULL, WR_QPP | SECT_4K},
{"N25Q512", 0x20ba20, 0x0, 64 * 1024, 1024, RD_FULL, WR_QPP | E_FSR | SECT_4K},
{"N25Q512A", 0x20bb20, 0x0, 64 * 1024, 1024, RD_FULL, WR_QPP | E_FSR | SECT_4K},
{"N25Q1024", 0x20ba21, 0x0, 64 * 1024, 2048, RD_FULL, WR_QPP | E_FSR | SECT_4K},
{"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL, WR_QPP | E_FSR | SECT_4K},
{"MT25QU02GC", 0x20bb22, 0x1044, 64 * 1024, 4096, RD_FULL, WR_QPP | E_FSR | SECT_4K},
#endif
이 향상된 기능은 향후 uboot-socfpga 릴리스에 포함됩니다.